A fully‐dynamic 6‐bit 3‐bit/cycle SAR ADC with a single differential DAC

This paper proposes a fully-dynamic 6-bit 3-bit/cycle SAR ADC. Unlike the prior multi-bit/cycle ADCs that require several differential DACs or consume static power, proposed ADC needs only one DAC and is fully-dynamic. helps reduce circuit complexity, input capacitance, power consumption. Furthermore, its comparator outputs are directly fed back to array, without any complicated logics, which further reduces complexity. Finally, simulation results demonstrate effectiveness of structure.